Datasheet
Test Report
2D drawing
- MCIO 74P dual port to PCIe x16 Gen5 convert
- Built-in MCIO 74P dual port connectors with 30u”(0.38um) min Au mating area plating
- Input PCIe CEM +12V power with TVS protection, 400W Peak Pulse Power Dissipation
- PCIe CEM +12V power with high side protection controller to enable N-MOS FET for 12V, 5A output
- PCIe CEM +12V PWM buck to 3.3V, 5A output with Eco-mode
- 3.3V, 5A Load Switch With Automatic Restart after Supervisor Fault Detection when Enabled to protect PCIe 5.0 ReDriver controller
- Input PCIe CEM power 3.3Vaux with Load Switch protection for Bus Buffer IC.
- Built-in ReDriver controller to extend PCIe 5.0, 32GT/s 16 lanes signals and may provide programmable linear equalization, flat gain.
- ReDriver CTLE boosts up to 22 dB at 16 GHz
- The PCIe 16 lanes can be bifurcated into four x4 link width to support different system topologies
- Built-in PCIe 100MHz clock buffer(Address: 0x6C) for MCIO 74P dual port to drive PCB more trace reach and longer cable length.
- Built-in SMBus Switch(Address: 0x70) with Reset funtion for MCIO 74P dual port SMBus communication
- Built-in SMBus I/O Expander(Address: 0x20) for OOB(out of band) management to remote MCIO 74P dual port Reset signals
- Built-in PERST# Bus Buffer Gate to be used in PCB more trace reach and longer cable length.
- Supports PCIe PERST# for OOB(out of band) management to remote MCIO 74P dual port Reset signals.
- Built-in WAKE# Bus Buffer Gate to be used in PCB more trace reach and longer cable length.
- Built-in CLKREQ# Bus Buffer Gate to be used in PCB more trace reach and longer cable length.
- LED1 Green ON indicates +12V ready
- LED2 Green ON indicates +3.3V ready
- LED3 Green ON indicates Vaux ready
- LED4 Red ON indicates Input +12V Error
- LED5 Red OFF indicates PERST# Normal (Function intentionally inverted)
- LED6 Red OFF indicates WAKE# Normal (Function intentionally inverted)
- LED7 Red OFF indicates CLKREQ# Normal (Function intentionally inverted)
- LED8 Green ON indicates Add-in card presnt
