Datasheet
DP8503 for M.2 NVMe dual port Test Report
DP8503-2D drawing
- PCIe x8 can be bifurcated to Gen-Z 1C (EDSFF) dual port
- Built- in EDSFF 1C with latch connector
- Built- in PCIe ReDriver to extend PCIe Gen4, 16GT/s differential pair signals
- Built- in 100MHz Clock buffer to drive longer trace lengths and longer cable
- Built- in SMBus Switch with Reset Function(Address: 0xE2)
- Built- in SMBUS I/O Expander(Fixed Address: 0x41)
- Built- in PERST# Bus Buffer with Open-Drain output to be used over longer trace lengths and over longer cable
- Built- in WAKE# Bus Buffer with Open-Drain output to be used over longer trace lengths and over longer cable
- Built- in CLKREQ# Bus Buffer with Open-Drain output to be used over longer trace lengths and longer over cable
- Built- in PWRBRK# Bus Buffer with Open-Drain output to be used over longer trace lengths and longer over cable
