Datasheet
Test report
2D drawing
- Internal Mini SAS HD 1x2, 4X(SFF-8673) dual port to PCIe x16 Gen4 convert
- Built-in SFF-8673 1x2, 4X dual port connector with 30u”(0.38um) min Au mating area plating
- Input +12V, +3.3V, 3.3VAUX with TVS protection
- Built-in +12V to 3.3V_IN, 5.5A current PWM Power controller
- Built-in 3.3V_IN Power Load Switch for ReDriver controller Power Protection.
- PCIe 4.0 16-lane signals input and output with ESD protection
- Built-in ReDriver to extend PCIe 4.0, 16GT/s 16 lanes differential pair signals and may provides programmable linear equalization, output swing and flat gain
- The PCIe 16 lanes can be bifurcated into four x4 link width to support different system topologies
- Built-in PCIe 100MHz Clock buffer(Address: 0x6C) for SFF-8673 dual port to drive longer cable length. It may be buffered and fanned out to the SFF-8673 dual port clock pin.
- Built-in SMBus Switch(Address: 0x70) with Reset Funtion for SFF-8673 dual port SMBus communication
- Built-in SMBus I/O Expander(Address: 0x20) for OOB(out of band) management to remote SFF-8673 dual port Reset signals.
- Supports PCIe PERST# management to control SFF-8673 dual port Reset signals.
- Built-in PERST# Bus Buffer to be used longer cable length.
- Built-in WAKE# Auto-Bidirectional Bus Buffer to be used longer cable length.
- Built-in CLKREQ# Auto-Bidirectional Bus Buffer to be used longer cable length.
- LED1 Green LED on indicates AIC ready
- LED2 Red OFF indicates WAKE# Normal (Function intentionally inverted)
- LED3 Red OFF indicates CLKREQ# Normal (Function intentionally inverted)
- LED4 Red OFF indicates PERST# Normal (Function intentionally inverted)
- PCI Express Base Specification Rev 4.0
- PCIe_CEM_SPEC_R4_V1_0_08072019_NCB
- Compliant with Support SFF-9402 Rev1.1
- Compliant with PCI_Express_OCuLink_1.0a
