Datasheet
Test report for U.2 NVMe SSD
Test report for GD1401A+M.2 NVMe SSD
2D drawing
- MCIO 38P (SFF-TA-1016) to M.2 PCIe 4.0 convert
- Built- in MCIO 38P connector with 30u”(0.76um) min Au mating area plating
- Built- in PCIe ReDriver to extend PCIe 4.0, 16GT/s differential pair signals
- Built- in PCIe 100MHz Clock buffer to drive longer trace lengths and longer cable
- Built- in SMBus repeater and Voltage level shift with Hot swappable level translating
- Built- in PERST# Bidirectional Voltage-Level Translator, it is tied to MCIO 38P A11 pin
- Built- in WAKE# Bidirectional Voltage-Level Translator, it is tied to MCIO 38P B8 pin
- Built- in CLKREQ# Bidirectional Voltage-Level Translator, it is tied to MCIO 38P A12 pin
- Built- in PWRDIS Bidirectional Voltage-Level Translator, it is tied to MCIO 38P B9 pin
